Semiconductors: Chokepoints and risks
Chip designers and fabs making logic, memory, analogue and power chips from silicon
Chokepoints and risks
- Taiwan hosts over 70% of sub-10 nm logic capacity and TSMC about 70% of foundry revenue, so a Taiwan Strait disruption would halt most advanced chip supply2,3.
- One supplier makes all EUV lithography tools and 87% of lithography overall2, and three makers take about 92% of DRAM revenue6.
- Export controls on tools, design software, chips and minerals (gallium, germanium) are tightening between the US and China, and three firms hold over 85% of EDA5.
- Fabs need firm power and very large volumes of ultra-pure water, which constrains new sites including in India.
- Demand is cyclical and now leans heavily on AI computing, which drove most of the 26% growth in 20251.